1. Field of the Invention
Embodiments of the present invention generally relate to a method and apparatus for handling semiconductor substrates in a chemical mechanical polishing system.
2. Description of the Related Art
In the process of fabricating modern semiconductor integrated circuits (ICS), it is necessary to develop various material layers over previously formed layers and structures. However, the prior formations often leave the top surface topography unsuitable for the position of subsequent layers of material. For example, when printing a photolithographic pattern having small geometries over previously formed layers, a shallow depth of focus is required. Accordingly, it becomes essential to have a flat and planar surface, otherwise, some of the pattern will be in focus while other parts of the pattern will not. In addition, if the irregularities are not leveled prior to certain processing steps, the surface topography of the substrate can become even more irregular, causing further problems as the layers stack up during further processing. Depending on the die type and the size of geometries involved, the surface irregularities can lead to poor yield and device performance. Consequently, it is desirable to achieve some type of planarization, or polishing, of films during IC fabrication.
One method for planarizing a layer during IC fabrication is chemical mechanical polishing (CMP). In general, CMP involves pressing of the substrate against a polishing material while proving relative motion therebetween in presence of a polishing fluid. The polishing fluid that typically contains at least one of an abrasive or chemical polishing composition that assists in the planarization process. The substrate may progress through several different polishing materials of finer abrasive materials and/or chemistries to achieve a highly planarized or polished surface. Once polished, the semiconductor substrate is transferred from the CMP to a series of cleaning modules that remove the abrasive particles and/or other contaminants that cling to the substrate after polishing.
As customer application needs have become more diverse and complex, a desire to provide a configurable and flexible CMP system has become paramount. Conventional CMP systems generally require all polishing heads to move between a polishing platen and a load cup or to other process/metrology stations in unison, thus making throughput dependent on the completion of the longest process being performed in the system. In addition, it is desirable that the CMP system be configured to minimize defect issues (real and perceived) from particles generated by the motion of the components of the system.
Therefore, there is a need in the art for an improved method and apparatus for handling semiconductor substrates in a CMP system.